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Wei Jia-Nan, Guo Hong-Xia, Zhang Feng-Qi, Luo Yin-Hong, Ding Li-Li, Pan Xiao-Yu, Zhang Yang, Liu Yu-Hui. Ionizing radiation effect on single event upset sensitivity of ferroelectric random access memory. Chinese Physics B, 2017, 26(9): 096102  
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Ionizing radiation effect on single event upset sensitivity of ferroelectric random access memory
Wei Jia-Nan1, †, Guo Hong-Xia1, 2, Zhang Feng-Qi2, Luo Yin-Hong2, Ding Li-Li2, Pan Xiao-Yu2, Zhang Yang1, Liu Yu-Hui1
School of Material Science and Engineering, Xiangtan University, Xiangtan 411105, China
Northwest Institute of Nuclear Technology, Xi’an 710024, China

 

† Corresponding author. E-mail: weijianan93@163.com

Abstract

The impact of ionizing radiation effect on single event upset (SEU) sensitivity of ferroelectric random access memory (FRAM) is studied in this work. The test specimens were firstly subjected to 60Co γ-ray and then the SEU evaluation was conducted using 209Bi ions. As a result of TID-induced fatigue-like and imprint-like phenomena of the ferroelectric material, the SEU cross sections of the post-irradiated devices shift substantially. Different trends of SEU cross section with elevated dose were also found, depending on whether the same or complementary test pattern was employed during the TID exposure and the SEU measurement.

PACS: 61.80.Ed;61.80.Jh;85.50.Gk
Keyword:ferroelectric random access memory;ionizing radiation effect;single event upset
1. Introduction

Ferroelectric random access memory (FRAM) is a type of nonvolatile memory that reads and writes like a standard static random access memory (SRAM). It is nonvolatile due to its unique ferroelectric thin-film process. The binary information is stored as a polarization state of the ferroelectric material. FRAM features multiple advantages such as high-speed read/write (< 50 ns), high switching endurance (≥ 1013), and low power consumption in comparison with the conventional FLASH and EEPROM.[1] Moreover, several research studies have shown that the ferroelectric material has superior radiation hardness, which makes FRAM attractive for the storage of key information in civilian satellite applications.[2–6]

Long-life and highly reliable aerospace devices in the space environment are affected by many kinds of radiation effects simultaneously, including total ionizing dose (TID) and single event upset (SEU), which are two of the most common effects. Some researchers investigated the impact of ionizing radiation on SEU sensitivity of complementary metal oxide semiconductor (CMOS) devices and found that the SEU cross section can be substantially shifted by ionizing radiation.[7–9] Preliminary works about the TID and SEU effects on FRAM have been done separately in the past few decades. The results of TID experiments showed that the radiation tolerance of FRAM is much higher at static mode than that at dynamic mode[10] and the radiation response is dominated by the CMOS circuits.[11,12] Zanata[13] investigated FRAMs subjected to x-ray and proton irradiation with doses up to 9 Mrad(Si) and detected only stuck bits without data corruption in the unpowered devices. SEU information of FRAM is very limited but existing data still marks a lower saturated SEU cross section than that of SRAM.[14] However, few reports about the synergistic effects of TID and SEU on FRAM are available.

The purpose of this work is to analyze the ionizing radiation effect on SEU sensitivity of commercial 90 nm FRAM. The devices were firstly irradiated unpowered with 60Co γ-ray and then the SEU evaluation was conducted on both the heavy-ion accelerator and the pulsed laser microbeam facility. TID-induced variations of the SEU sensitivity are presented and the related mechanisms are discussed.

2. Experiment details

The parameters of the test devices are listed in Table 1. The TID experiment was performed with 60Co source at Northwest Institute of Nuclear Technology and the dose rate was 70 rad(Si)/s. 18 samples were investigated, 15 of which were split into 5 groups and irradiated to 0.5 Mrad(Si), 1 Mrad(Si), 2 Mrad(Si), 3 Mrad(Si) and 4 Mrad(Si), respectively, and the remaining devices were used as the control group. Before exposure, all bytes of the devices were set to a checkerboard pattern (55H). All devices were unpowered with terminals grounded during the irradiation. We chose this bias condition because in space applications, when the nonvolatile memory is not accessed, it is kept in a power-off state to enhance the ability to resist SEU. Meanwhile, the samples were decapped from the front side in order to carry out the following heavy ion experiment.

Table 1.

Parameters of test devices.

.

The SEU measurement was conducted with 209Bi ions on the Heavy Ion Research Facility in Lanzhou (HIRFL). The penetrating depth of 209Bi in silicon is 69.8 μm. The test board was mounted 4 cm away from the extraction window, where the linear energy transfer (LET) of 209Bi was about 99.8 MeV·mg−1·cm2. The flux varied from 4 × 103cm−2·s−1 to 6 × 103 cm−2·s−1 and the fluence was about 1 × 106 cm−2 for each test cycle. In this experiment, two test patterns (55H and AAH) were used and the devices under test operated in dynamic mode. Data was read out in a circular manner and then compared with the correct test pattern in real time to count upsets. Due to the limits of funds and experimental time of the accelerator, only the two groups of samples that were exposed to 2 Mrad(Si) and 4 Mrad(Si) as well as the control group were irradiated with heavy ions.

The pulsed laser microbeam facility of Northwest Institute of Nuclear Technology was also used to obtain the complete SEU cross section curve. Pulsed laser with a wavelength of 1064 nm was used and the test patterns and operating mode were identical to those used in the heavy-ion test. It was difficult for the pulsed laser to reach the sensitive volume from the front side due to the block of the metal layers, so the backside testing method was used. The devices were deluded from the back side and the metallic die pad was removed. Then a polishing machine was employed to polish the silicon substrate.

3. Experiment results
3.1. TID results

Functional verification was done immediately after TID irradiation. All devices could operate normally with no read/write errors. Figure 1 shows the currents of two sample devices (SA1 and SA2) as a function of dose and annealing time. The standby current increases rapidly before 0.5 Mrad(Si) and then becomes saturated at 2 Mrad(Si). Recovery is significant with room temperature annealing in the first day but becomes slight from the second day to the 10th day. The dose and annealing time have very limited impact on the active current and the biggest change is less than 0.03% of the initial value.

Fig. 1. (color online) Standby and active currents as a function of irradiation dose and annealing time.
3.2. SEU results

Figure 2 shows the SEU results measured with 209Bi ions. The SEU cross sections obtained with both 55H and AAH patterns decrease notably at the dose level of 2 Mrad(Si). For the 55H test pattern, the SEU cross section decreases from 5.5 × 10−3 cm2 to 2.8 × 10−3 cm2, and for the AAH pattern, the SEU cross section decreases from 5.9 × 10−3 cm2 to 2.5 × 10−3 cm2. When the total irradiation dose reaches 4 Mrad(Si), the SEU cross section measured with 55H pattern reduces to 2.3 × 10−3 cm2, while the cross section measured with AAH pattern increases to 4.2 × 10−3 cm2.

Fig. 2. (color online) SEU cross sections as a function of irradiation dose with different test patterns.

Another noteworthy phenomenon is related to the SEU cross sections of “0” to “1” upsets (σ0→1) and “1” to “0” upsets (σ1→). Table 2 shows a set of σ0→1 and σ1→0 results measured using 209Bi ions. A coefficient k is defined to characterize the decrease amplitude of the SEU cross sections and it is obtained by dividing the SEU cross section of the unirradiated device by that of the device irradiated to the given dose level. We can see that k0→1 is always larger than σ1→0, independent of dose and test patterns, which indicates that the TID-induced restraint of SEU is more significant for the bits that store the binary information “0”.

Table 2.

Comparison between σ0→ 1 and σ1→ 0 with two different test patterns.

.

The SEU cross section curve obtained using the pulsed laser microbeam facility is shown in Fig. 3. At the dose level of 2 Mrad(Si) (Fig. 3(b)), the deviation between the SEU cross sections with 55H and AAH patterns is not obvious and there seems to be no change of the saturated cross section compared with that of the unirradiated device (Fig. 3(a)). While at the dose level of 4 Mrad(Si) (Fig. 3(c)), the SEU cross section with AAH pattern is significantly larger than that with 55H. Furthermore, we investigated the SEU of the memory array and detected no upset as the energy rose to 2 nJ. Therefore we believe that the SEU we detected in the pulsed laser experiment results from the periphery CMOS circuits.

Fig. 3. (color online) SEU results measured by the pulsed laser facility with different test patterns: (a) Mrad(Si), (b) 2 Mrad(Si), (c) 4 Mrad(Si).
4. Discussion
4.1. TID-induced degradations in periphery circuits

According to the manufacturing process and the internal structure, the conventional FRAM can be divided into two parts: periphery circuits in the CMOS process and memory cells in the ferroelectric process. As a consequence, the degradation caused by the ionizing effect should be discussed separately. When the device is in standby, the memory cells are always at a high impedance state, independent of the bias conditions. So the increase of the standby current is mainly caused by the degradation of the periphery CMOS circuits. Ionizing radiation introduces a large amount of electron–hole pairs into the gate oxide and field oxide. However, in the unpowered devices used in our experiment, the ionization-induced electron–hole pairs will recombine to a large extent and contribute very little to trapped charges. So a constant increase of the standby current accompanied with a burst of read errors in powered devices is not found here. The rapid recovery of the standby current in the first day probably results from the annealing of the shallow levels and metastable state oxide trapped charges. After 10 days of room temperature annealing, the standby current is still larger than the initial value, which can prove the existence of deep level oxide trapped charges. High temperature annealing may be effective to eliminate these charges. The ionizing radiation effect on the active current is more complex and the degradation of the periphery circuits and memory cells should be considered together. However, the change of the active current after irradiation is so small compared with the initial value that it can be ignored. Hence, the mechanism is not discussed here and we think that the TID-induced degradation in the periphery circuits has little impact on the SEU results, especially when the device is in the dynamic mode.

4.2. Variations of SEU sensitivity
4.2.1. Operating principles and SEU failure mechanisms of FRAM

A ferroelectric memory cell with 1T-1C structure is shown in Fig. 4. The cell consists of a ferroelectric capacitor that is connected to plateline (PL) at one end and to bitline (BL) via an access NMOS transistor at the other end. A hysteresis loop of the ferroelectric capacitor that displays the change of polarization as a function of the electric field is shown in Fig. 5. The two remanent polarization states PR and −PR are used to store the binary data “0” and “1”, respectively. During the reading cycle, a positive electric field is applied through PL and the polarization reversal current will conduct to BL. Then the voltage developed on BL will be detected by the sense amplifier. If the capacitor is pre-poled with PR, the bitline voltage is relatively low and will be pulled down to 0 V (read “0”). However, a high bitline voltage will be generated if the capacitor is pre-poled with −PR due to more switched electric domains and as a result the bitline voltage will be pulled up to VDD (read “1”).[15,16]

Fig. 4. Diagram of a 1T-1C ferroelectric memory cell.
Fig. 5. Hysteresis loop of the ferroelectric capacitor.

There are two ways to cause SEU in FRAM. The first way is to trigger upsets by striking the access transistor in the memory cell. During the SEU test, readout data will appear on BL. Since the BL is shared by multiple cells, for the unselected cells, there will also be a voltage applied to the end connected with BL of the access transistor. If the ions strike the sensitive region of the access transistor, a transient impulse current will be induced due to charge collection. The current can charge or discharge the ferroelectric capacitor. Thus, PR and −PR will be disturbed and so will the corresponding bitline voltages. Once the shifted bitline voltage is unable to be distinguished from the reference voltage by the sense amplifier, readout errors will be detected. The second way is to write the incorrect data caused by the periphery circuits into the memory cell through the writeback process. The readout method of FRAM is destructive because of the polarization reversal of the ferroelectric capacitors, so a writeback operation is necessary to restore the BL data to the capacitors. Before the start of the writeback operation, the bitline voltage may be shifted by single event effects in the periphery CMOS circuits, such as localized latch-up and single event transient pulse. Therefore the ferroelectric capacitor storing “0” may be excessively written back and the ferroelectric capacitor storing “1” may be insufficiently written back, which is expected to cause readout errors in the next reading cycle. So the robustness of the ferroelectric capacitor has a close relationship with the SEU sensitivity.

4.2.2. Decrease of SEU cross section at 2 Mrad(Si)

From Figs. 3(a) and 3(b), at the dose level of 2 Mrad(Si), the saturated cross sections of the upsets caused by the periphery circuits with the two test patterns are almost the same as those obtained from the unirradiated devices, so the altered sensitivity of upsets that are caused by striking the access transistor is the key factor that leads to the decrease in SEU cross section at 2 Mrad(Si) in Fig. 2. During the γ-ray irradiation, a large amount of electron–hole pairs can be generated in the ferroelectric material. Under the strong local field due to the large polarization in ferroelectrics, the electron–hole pairs will be separated. On one hand, some of the separated charges will be trapped by the pre-existing defects at the domain walls and grain boundaries, which will cause the pinning of the domain walls and further lead to polarization loss. This is a fatigue-like phenomenon. On the other hand, some of the charges will be swept out to the ferroelectric/electrode interface by the depolarizing field (ED) and then trapped by defects at the interface. These trapped charges can build up an internal bias field (EI) and screen ED, which will cause a shift of the coercive field. As a consequence, if the ferroelectric capacitor is pre-poled with PR before irradiation, the hysteresis loop shifts leftward. Similarly, the opposite shift occurs if the capacitor is pre-poled with −PR.[17–19] This is an imprint-like phenomenon. The hysteresis loops for the capacitors pre-poled with PR and −PR are presented in Fig. 6, where the dotted lines represent the hysteresis loops of the irradiated capacitors and the solid lines represent those of the fresh ones. Figure 6(a) presents the capacitors storing “0”, and are the positive saturated polarization and positive remanent polarization respectively; and are the negative saturated polarization and negative remanent polarization respectively. Figure 6(b) presents the capacitors storing “1”, and are the positive saturated polarization and positive remanent polarization respectively; and are the negative saturated polarization and negative remanent polarization respectively.

Fig. 6. Schematic representation of the radiation induced effects on the hysteresis loop of a ferroelectric capacitor: (a) pre-poled to PR (store “0”); (b) pre-poled to −PR (store “1”).

Apart from the degradation discussed above, the hysteresis loop also becomes flatter for the post-irradiated ferroelectric capacitors. In other words, the change of polarization with the electric field becomes slower than before. Thus, when the same voltage fluctuation caused by the incident ions is applied to the electrode, the remanent polarization loss may be less for the post-irradiated capacitors than the pre-irradiated ones, which can lead to the restraint of SEU sensitivity.

4.2.3. Distinction of SEU cross section with different test patterns at 4 Mrad(Si)

As can be seen from both Figs. 2 and 3(c), at the dose level of 4 Mrad(Si), the SEU cross sections of AAH and 55H are significantly different, so the sensitivity of upsets caused in the two ways should be considered together to explain this difference. On one hand, the polarization degradation in the pre-poled capacitors is asymmetric. As is shown in Fig. 6, if the capacitor is pre-poled positively with PR, the negative remanent polarization −PR reduces more strongly than PR. On the contrary, the positive remanent polarization PR reduces more strongly when the capacitor is negatively pre-poled with −PR. That is to say, the noise margin of the capacitor is smaller when the data stored in it is complementary to that stored during the γ-ray irradiation. Consequently, the incident ions are more likely to cause upsets in the cells that store AAH in our experiment. Moreover, we can expect that if the dose continues to increase from 4 Mrad(Si), the SEU cross section of AAH may continue to increase, and stuck bits, which refer to some bits that are fixed at the initial data and cannot be switched during the write cycle, may occur even without incident ions due to the disappeared noise margin, as reported in Mauro Zanata's work.[13] On the other hand, the scale of data upsets caused by the periphery circuits seems to be discrepant when different test patterns are used, as shown in Fig. 3(c). It is well known that the writeback operation is not indispensable for the capacitors storing “0” because the positive PL voltage can reinforce “0” during every readout operation. While a high negative voltage is essential to restore the initial data for capacitors storing “1”. As has been noted above, ionizing radiation can deform the hysteresis loop and make the polarization state unresponsive to the external field, so the voltage disturbance on the bitline is more likely to result in insufficient writeback of the capacitors storing “1” and lead to “1” to “0” upsets. Meanwhile, as a consequence of the positive shift of the coercive field, the capacitors storing “1” in the 55H pattern will not suffer so badly compared with those in the AAH pattern. In fact, the difference between the SEU cross sections in Fig. 3(c) is mainly caused by the different amounts of “1” to “0” upsets. Figure 7 shows a set of pulsed laser results of σ0→1 and σ1→ with the two test patterns at 4 Mrad(Si). There is no obvious change in σ→1, while σ1→ measured with the AAH pattern is much larger than that with the 55H pattern.

Fig. 7. (color online) Comparison between σ0→1 and σ1→0 measured by the pulsed laser facility with two different test patterns at 4 Mrad(Si).
4.2.4. Inconformity of the variation of σ0→1 and σ1→0 with dose

The inconformity of the variation of σ0→1 and σ1→0 in Table 2 could also be explained by two factors. One is the increased “1” to “0” upsets caused by insufficient writeback at 4 Mrad(Si) discussed in the previous section, the other is the asymmetric degradation of the effective polarization reversal. In Fig. 6, for the capacitors that store “0”, the change of the effective polarization reversal after irradiation (Δ P0), which will directly affect the bitline voltage, in the reading cycle of the device with 55H pattern can be given by

while that of the capacitors that store “1” (Δ P1) can be given by
From Eqs. (1) and (2) we can compare ΔP1 with ΔP0 by
Since the ferroelectric capacitors are independent during the TID exposure, we can assume that the degradation of the capacitors storing “0” and “1” is origin-symmetric. So () can be considered as 0. Moreover, the first two items on the right-hand side of Eq. (3) are always less than 0. Hence, ΔP0−ΔP1 < 0. That is to say, after irradiation, the polarization margin is larger for the capacitors storing “0” than those storing “1”, which makes the “0” to “1” upset cross section decrease more significantly. For the devices with AAH pattern, the same equation can be derived as Eq. (3) and the same result can also be obtained.

5. Conclusion

The impact of ionizing radiation on SEU sensitivity of ferroelectric memory has been studied in this work. Experiment results indicate that ionizing radiation has a notable impact on the SEU sensitivity. The SEU cross section decreases at the dose level of 2 Mrad(Si) in the heavy ion experiment, independent of the applied test patterns. This should be attributed to the combined effect of the fatigue-like phenomenon, which is caused by the trapping of TID-induced charges at the domain walls and grain boundaries and the consequent domain wall pinning, and the imprint-like phenomenon, which is caused by the TID-induced internal bias field, of the ferroelectric material. This kind of synthesis can deform the P–E hysteresis loop to a flatter shape and the sensitivity of the remanent polarization to the external electric field is weakened. At the dose level of 4 Mrad(Si), the SEU cross section measured with the 55H pattern continues to decrease, while an obvious growth of the SEU cross section measured with the AAH pattern is found. One reason is that the TID-induced polarization degradation in the pre-poled capacitors is asymmetric and the noise margin decreases more strongly when the AAH pattern is applied. Another reason may be that the insufficient writeback of the capacitors storing “1” in the AAH pattern is more serious than that in the 55H pattern, so more “1” to “0” upsets occur under the AAH pattern. Meanwhile, the TID-induced restraint of “0” to “1” upsets is more obvious than that of “1” to “0” upsets within the dose range studied in this work. This is mainly because the degradation of the effective polarization reversal is larger when the capacitors store “1”, which will reduce the effective polarization transition during the reading cycle and further lead to more “1” to “0” upsets.

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